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DS28CZ04: 4Kb I2C/SMBus EEPROM with Nonvolatile PIO
SFF Optional Status Register (Device Address = A2h, only if SFF Mode is on)
ADDR
6Eh
b7
0
b6
0
b5
0
b4
0
b3
0
b2
TXF
b1
LOS
b0
0
This register is read only. The functional assignments of the individual bits are explained in the table below. Bits 0
and 3 to 7 have no function; they always read 0 and cannot be set to 1.
BIT DESCRIPTION
LOS: Loss Of Signal
TXF: TX_FAULT
BIT(S)
b1
b2
DEFINITION
Reports the logical state of PIO0; in SFF-8472 compatible modules,
PIO0 is connected to the Loss Of Signal indicator
Reports the logical state of PIO1; in SFF-8472 compatible modules,
PIO1 is connected to the TX_FAULT indicator
DEVICE OPERATION
The typical use of the DS28CZ04 in an application involves writing to and reading from the memory and accessing
the PIOs. All these activities are controlled through the I2C/SMBus serial interface. Since the DS28CZ04 has
memory areas and registers of different characteristics there are several special cases to consider. See section
Read and Write for details.
Serial Communication Interface
General Characteristics
The serial interface uses a data line (SDA) plus a clock signal (SCL) for communication. Both SDA and SCL are
bidirectional lines, connected to a positive supply voltage through a pullup resistor. When there is no
communication, both lines are HIGH. The output stages of devices connected to the bus must have an open-drain
or open-collector to perform the wired-AND function. Data can be transferred at rates of up to 100kbps in the
Standard-mode, up to 400kbps in the Fast-mode. The DS28CZ04 works in both modes.
A device that sends data on the bus is defined as a transmitter, and a device receiving data as a receiver. The
device that controls the communication is called a “master.” The devices that are controlled by the master are
“slaves.” The DS28CZ04 is a slave device.
Slave Address/Direction Byte
To be individually accessed, each device must have a slave address that does not conflict with other devices on
the bus. The slave address to which the DS28CZ04 responds is shown in Figure 4. The slave address is part of the
slave-address/direction byte. The upper 4 bits of the slave address of the DS28CZ04 are set to 1010b. Bits A1 and
A2 correspond to the A1 and A2 pins; to be selected the device must be addressed with A1 and A2 bits matching
the logical state of the respective pins.
Figure 4. DS28CZ04 Slave Address
7-Bit Slave Address
A6
A5
A4
A3
A2
A1
A0
1
0
1
0
A2
A1
P0
R/W
Most Signi-
ficant Bit
Pin States
See Text
Determines
Read or Write
10 of 22
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